中文

A Low-Latency, Highly-Pipelined Hardware Architecture for H.266/VVC Dependent Quantization

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  • Release time:2025-12-15

  • Journal:IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS

  • First Author:Jun Zhang, Weizhi Bian

  • Indexed by:Journal paper

  • Correspondence Author:Hao Zhang

  • Document Type:J

  • Volume:72

  • Issue:8

  • Page Number:4040-4051

  • Translation or Not:no

  • Date of Publication:2025-08-01

  • Included Journals:SCI


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