Impact Factor:3.367
DOI number:10.1109/ACCESS.2020.3003009
Journal:IEEE Access
Key Words:Phase locked loops; Band-pass filters; Frequency estimation; Resonant frequency; Inverters; Periodic structures; Frequency synchronization; DC offset; inverters; phase-locked loop (PLL); second order generalized integral
Abstract:Synchronous reference frame phase-locked loop (SRF-PLL) is widely used for grid voltage synchronization in single-phase grid-connected power converters. However, in the actual situation, dc offset component may be introduced in the input of the PLL, due to the transient fault of the power grid, sampling and measurement error, or A/D signal processing. A simple yet effective approach with additional all-pass filter based dc rejecter is presented for SRF-PLL, in this paper. Thereby, correct estimation and undesirable periodic ripple free can be achieved in SRF-PLL, when the input signal contains dc offset. The second order generalized integrator based PLL (SOGI-PLL) is first introduced, followed by the analysis on influence of the input dc offsets in SRF-PLL. The structure of enhanced-SOGI (ESOGI) with its analysis of dc offset rejection effects and performance have been then formulated in detail. Finally, experimental results are presented to demonstrate the effectiveness of the proposed ESOGI based PLL.
Co-author:An, Mengjun, Wang, Hui, Zhang, Zhigang, Xu, Chenhua, Song, Shaojian, Lv, Zhilin
First Author:Liu, Bin
Indexed by:Journal paper
Correspondence Author:Chen, Yanming
Document Code:19799200
Discipline:Engineering
First-Level Discipline:Electrical Engineering
Document Type:J
Volume:8
Page Number:112297-112308
ISSN No.:2169-3536
Translation or Not:no
Included Journals:SCI、EI
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